Posts by Microcruncher*

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1) Message boards : Number crunching : GTX970 / GTX980 - nVidia Maxwell (Message 80501)
Posted 3144 days ago by

Microcruncher*

An update to new CUDA 6.5 may straighten this out ?

No. Been there, done that...

BTW: Take a look at the operations per clock cycle per multiprocessor:

32-bit integer multiply, multiply-add, extended-precision multiply-add:

16 for CC 2.x.
32 for CC 3.x

"Multiple Instructions" for CC 1.x and now again for CC 5.x

Source: CUDA C Programming Guide (CUDA 6.5 SDK)

2) Message boards : Project Staging Area : AVX build of llr (20%-50% faster) (Message 54740)
Posted 4030 days ago by

Microcruncher*

On the other side will increase Intel with AVX2 the register width to 512bit...

Mmmhhh...

grep "__m256" avx2intrin.h | wc 485 1996 22929 grep "__m512" avx2intrin.h | wc 0 0 0 grep "__m256" *intrin.h | wc 932 4688 63318 grep "__m512" *intrin.h | wc 0 0 0

Intels AVX(2) manual only mentions VEX.128 and VEX.256 instructions

3) Message boards : Number crunching : Badges (Message 52975)
Posted 4067 days ago by

Microcruncher*

2 upgrades:

SGS and CW sieve.

4) Message boards : Number crunching : Sub-project "life" expectancy (Message 52843)
Posted 4071 days ago by

Microcruncher*

Thanks! Didn't think about it ))

http://www.primegrid.com/stats_sgs_llr.php

provides some additional info.

5) Message boards : Number crunching : Sub-project "life" expectancy (Message 52794)
Posted 4072 days ago by

Microcruncher*

1. Could you also please explain about higher n's? (666667-666685). We haven't reached k=40 on those n's. Then why are we stopping only because we have reached k=40 at n=666666?

There is only one n ;) Here is an example:

8 * 2^666666 + 1 = 4 * 2^666667 +1 = 2 * 2^666668 + 1 = 1 * 2^666669 + 1

So the limits are:

k=40T for n=666666
k=20T for n=666667
k=10T for n=666668
.
.
.
k=77M for n=666685

6) Message boards : Number crunching : The Marie Sophie Germain Challenge 2012 (Message 52608)
Posted 4076 days ago by

Microcruncher*

I took part with 10 real CPU's no Hypertreading and got always enough work.
I had have no problem during this challenge.
The ranking show me at place 206
206 _heinz 17772.63

I'm happy with it.
Happy crunching

_heinz

Congrats.

Rank 176 here with 4 cores (8 threads) and ca. 40 hours of crunching. Hyperthreading helped a little bit.

7) Message boards : Number crunching : Badges - Full Sets! (Message 48968)
Posted 4134 days ago by

Microcruncher*

2^4 badges. Or was it 4^2?

8) Message boards : Number crunching : Badges (Message 48967)
Posted 4134 days ago by

Microcruncher*

ditto

9) Message boards : Project Staging Area : AVX build of llr (20%-50% faster) (Message 48884)
Posted 4135 days ago by

Microcruncher*

AVX comes with Intels Sandy Bridge processors; maybe this list helps

Thanks! So no speedup is the expected behavior. Still it should work without strange messages, right?

In addition to the CPU side of things:

If AVX support wasn't backported to your kernel 2.6.18 should not support it. AVX support was introduced with kernel version 2.6.30 but I don't know what extra patches were applied to your kernel version.

One quick and dirty way to check if your CPU (and your kernel) supports AVX is this command:

cat /proc/cpuinfo | sort -u | grep avx flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 popcnt tsc_deadline_timer aes xsave avx lahf_lm ida arat epb xsaveopt pln pts dts tpr_shadow vnmi flexpriority ept vpid

Expect new entries like rdrnd for Ivy Bridge and avx2 for Haswell ;)

10) Message boards : Number crunching : AMD FX X8 8120 not working with AVX! (Message 48880)
Posted 4135 days ago by

Microcruncher*

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