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drummers-lowrise
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Running PPS sieve under Mesa3D 17.3.0rcX
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I made small fix for Mesa3D that fixes segfault on PPS Sieve OpenCL application:
file 'gallium/drivers/radeon/r600_pipe_common.c' (at r600_disk_cache_create function):
if (disk_cache_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo,
&llvm_timestamp)) {
/*res = asprintf(×tamp_str, "%u_%u",
mesa_timestamp, llvm_timestamp);*/
timestamp_str = malloc(100);
sprintf(timestamp_str, "%u_%u",
mesa_timestamp, llvm_timestamp);
}
diff:
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index b77d85901f..40c713a422 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -914,7 +914,10 @@ static void r600_disk_cache_create(struct r600_common_screen *rscreen)
if (disk_cache_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo,
&llvm_timestamp)) {
- res = asprintf(×tamp_str, "%u_%u",
+ /*res = asprintf(×tamp_str, "%u_%u",
+ mesa_timestamp, llvm_timestamp);*/
+ timestamp_str = malloc(100);
+ sprintf(timestamp_str, "%u_%u",
mesa_timestamp, llvm_timestamp);
}
works good on my RX 480 and RX VEGA (but slower than on propietary AMD OpenCL drivers). | |
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streamVolunteer moderator Project administrator Volunteer developer Volunteer tester Send message
Joined: 1 Mar 14 Posts: 1022 ID: 301928 Credit: 543,195,188 RAC: 112
                        
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All what your patch does is leaving "res" uninitialized. Most probably code below will change behavior due to different (or random) value of "res".
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compositeVolunteer tester Send message
Joined: 16 Feb 10 Posts: 1099 ID: 55391 Credit: 959,419,215 RAC: 871,392
                       
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That's not saying that your segfaults won't return. It can be difficult to pinpoint the cause.
I was getting segfaults on GFN at the end of a run when messing with source code, which then continued to happen with normal production binaries. That was pretty jarring until I found that the genefer.dat benchmarks file was for the wrong set of transforms as a result of my experimentation. Once I realized this, the problem was solved trivially by deleting the genefer.dat file and letting the program recreate it from scratch. | |
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Oh, no. actually, i was omitting res value. but was initialized, so wrong patch disables disk cache for shaders.
new corrected path (in file 'gallium/drivers/radeon/r600_pipe_common.c' (at r600_disk_cache_create function):
/*res = asprintf(×tamp_str, "%u_%u",
mesa_timestamp, llvm_timestamp);*/
timestamp_str = malloc(100);
res = sprintf(timestamp_str, "%u_%u",
mesa_timestamp, llvm_timestamp);
patch:
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index b77d85901f..2e83c83754 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -914,7 +914,10 @@ static void r600_disk_cache_create(struct r600_common_screen *rscreen)
if (disk_cache_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo,
&llvm_timestamp)) {
- res = asprintf(×tamp_str, "%u_%u",
+ /*res = asprintf(×tamp_str, "%u_%u",
+ mesa_timestamp, llvm_timestamp);*/
+ timestamp_str = malloc(100);
+ res = sprintf(timestamp_str, "%u_%u",
mesa_timestamp, llvm_timestamp);
}
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Stupid question: Can I fix my the first post in this thread? Or, can anyone fix that stupid bug in first post? I can't find option edit my first post. | |
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Michael Goetz Volunteer moderator Project administrator
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Joined: 21 Jan 10 Posts: 13881 ID: 53948 Credit: 383,625,495 RAC: 119,859
                              
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Stupid question: Can I fix my the first post in this thread? Or, can anyone fix that stupid bug in first post? I can't find option edit my first post.
You can only edit a post for the first 15 minutes after it's posted. After that just post a new message with revisions.
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My lucky number is 75898524288+1 | |
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